The present invention relates generally to binary phase shift keyed (BPSK) modulators and particularly to a high frequency, slotline balanced binary phase shift keyed (BPSK) modulator that has less sensitivity to terminating impedance and is capable of operation at a data rate on the order of 3.8 gigabits per second.
A typical conventional slotline modulator that the present invention is intended to replace includes a slotline that comprises an etched metallic surface formed on a first surface of a dielectric substrate that also forms a ground plane, and a pair of diodes disposed across the slotline. A first microstrip line is disposed on a second surface of the substrate and is disposed orthogonal to a portion of the slotline. The first microstrip line couples an RF carrier input signal through the dielectric substrate to the diodes. Baseband data is injected into the diodes using a coplanar waveguide disposed on the first side of the substrate coupled by way of a wirebond connection that is formed across the slotline. The wirebond and coplanar waveguide either form or include a low pass filter. A PSK modulated signal output is provided at a second microstrip line disposed on the second surface of the substrate generally opposite to the location of the first microstrip line through which the carrier input signal is applied. A second microstrip line is oriented orthogonal to the a first microstrip line. This design approach restricts the achievable data rate and rise and fall times due to parasitics that are introduced in the low pass filter.
Accordingly, it is an objective of the present invention to provide for an improved slotline balanced binary phase shift keyed (BPSK) modulator that operates at relatively high speed and has less sensitivity to terminating impedance.